A 25 Gb/s × 4-channel 74 mW/ch transimpedance amplifier in 65 nm CMOS

Takashi Takemoto, Fumio Yuki, Hiroki Yamashita, Shinji Tsuji, Tatsuya Saito, Shinji Nishimura. A 25 Gb/s × 4-channel 74 mW/ch transimpedance amplifier in 65 nm CMOS. In Jacqueline Snyder, Rakesh Patel, Tom Andre, editors, IEEE Custom Integrated Circuits Conference, CICC 2010, San Jose, California, USA, 19-22 September, 2010, Proceedings. pages 1-4, IEEE, 2010. [doi]

@inproceedings{TakemotoYYTSN10,
  title = {A 25 Gb/s × 4-channel 74 mW/ch transimpedance amplifier in 65 nm CMOS},
  author = {Takashi Takemoto and Fumio Yuki and Hiroki Yamashita and Shinji Tsuji and Tatsuya Saito and Shinji Nishimura},
  year = {2010},
  doi = {10.1109/CICC.2010.5617420},
  url = {http://dx.doi.org/10.1109/CICC.2010.5617420},
  researchr = {https://researchr.org/publication/TakemotoYYTSN10},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2010, San Jose, California, USA, 19-22 September, 2010, Proceedings},
  editor = {Jacqueline Snyder and Rakesh Patel and Tom Andre},
  publisher = {IEEE},
  isbn = {978-1-4244-5758-8},
}