The following publications are possibly variants of this publication:
- A tool set for the design of asynchronous circuits with bundled-data implementationMinoru Iizuka, Naohiro Hamada, Hiroshi Saito, Ryoichi Yamaguchi, Minoru Yoshinaga. iccd 2011: 78-83 [doi]
- An ASIC Design Support Tool Set for Non-pipelined Asynchronous Circuits with Bundled-Data ImplementationMinoru Iizuka, Naohiro Hamada, Hiroshi Saito. ieicet, 96-C(4):482-491, 2013. [doi]
- A floorplan method for asynchronous circuits with bundled-data implementation on FPGAsHiroshi Saito, Naohiro Hamada, Tomohiro Yoneda, Takashi Nanya. iscas 2010: 925-928 [doi]
- A behavioral synthesis method for asynchronous circuits with bundled-data implementation (Tool paper)Naohiro Hamada, Yuuki Shiga, Hiroshi Saito, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya. acsd 2008: 50-55 [doi]
- A Design Support Tool Set for Interface Circuits Between Synchronous and Asynchronous ModulesShogo Semba, Hiroshi Saito. access, 11:13408-13420, 2023. [doi]