Kazuya Tanigawa, Tetsuo Hironaka. Evaluation of compact high-throughput reconfigurable architecture based on bit-serial computation. In Tarek A. El-Ghazawi, Yao-Wen Chang, Juinn-Dar Huang, Proshanta Saha, editors, 2008 International Conference on Field-Programmable Technology, FPT 2008, Taipei, Taiwan, December 7-10, 2008. pages 273-276, IEEE, 2008. [doi]
Abstract is missing.