Angeliki Tataridou, Gérard Ghibaudo, Christoforos G. Theodorou. VERILOR: A Verilog-A Model of Lorentzian Spectra for Simulating Trap-related Noise in CMOS Circuits. In 51st IEEE European Solid-State Device Research Conference, ESSDERC 2021, Grenoble, France, September 13-22, 2021. pages 247-250, IEEE, 2021. [doi]
Abstract is missing.