C. J. Tavares, C. Bungardean, G. M. Matos, José T. de Sousa. Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor. In Jürgen Becker, Marco Platzner, Serge Vernalde, editors, Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings. Volume 3203 of Lecture Notes in Computer Science, pages 344-353, Springer, 2004. [doi]
Abstract is missing.