Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gross. An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding. In Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings, October 17-19, 2007, Eton Hotel, Shanghai, China. pages 255-260, IEEE, 2007. [doi]
Abstract is missing.