Test methodology for Freescale's high performance e600 core based on PowerPC/spl reg/ instruction set architecture

Nandu Tendolkar, Dawit Belete, Ashutosh Razdan, Hereman Reyes, Bill Schwarz, Marie Sullivan. Test methodology for Freescale's high performance e600 core based on PowerPC/spl reg/ instruction set architecture. In Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005. pages 9, IEEE, 2005. [doi]

@inproceedings{TendolkarBRRSM05,
  title = {Test methodology for Freescale's high performance e600 core based on PowerPC/spl reg/ instruction set architecture},
  author = {Nandu Tendolkar and Dawit Belete and Ashutosh Razdan and Hereman Reyes and Bill Schwarz and Marie Sullivan},
  year = {2005},
  doi = {10.1109/TEST.2005.1583968},
  url = {http://doi.ieeecomputersociety.org/10.1109/TEST.2005.1583968},
  researchr = {https://researchr.org/publication/TendolkarBRRSM05},
  cites = {0},
  citedby = {0},
  pages = {9},
  booktitle = {Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005},
  publisher = {IEEE},
  isbn = {0-7803-9038-5},
}