Balancing Logic Utilization and Area Efficiency in FPGAs

Russell Tessier, Heather Giza. Balancing Logic Utilization and Area Efficiency in FPGAs. In Reiner W. Hartenstein, Herbert Grünbacher, editors, Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings. Volume 1896 of Lecture Notes in Computer Science, pages 535-544, Springer, 2000. [doi]

Abstract

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