Counter-based residue arithmetic circuit for easily testable VLSI digital signal processing systems

Nobuhiro Tomabechi. Counter-based residue arithmetic circuit for easily testable VLSI digital signal processing systems. In Computer Design: VLSI in Computers and Processors, ICCD 1989. Proceedings., 1989 IEEE International Conference on, Cambridge, MA, USA, October 2-4, 1989. pages 362-365, IEEE, 1989. [doi]

Abstract

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