A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications

Hidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Matsuaki Terada. A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications. IEICE Transactions, 90-C(10):1957-1963, 2007. [doi]

Authors

Hidehiro Toyoda

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Shinji Nishimura

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Michitaka Okuno

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Matsuaki Terada

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