A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet - researchr publication authors

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Hidehiro Toyoda, Michitaka Okuno, Shinji Nishimura, Matsuaki Terada. A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet. In Proceedings of IEEE International Conference on Communications, ICC 2008, Beijing, China, 19-23 May 2008. pages 5417-5421, IEEE, 2008. [doi]

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