A 14-bit 200MS/s current-steering DAC achieving over 82dB SFDR with digitally-assisted calibration and dynamic matching techniques

Jen-Huan Tsai, Yen-Ju Chen, Yan-Fong Lai, Meng-Hung Shen, Po-Chiun Huang. A 14-bit 200MS/s current-steering DAC achieving over 82dB SFDR with digitally-assisted calibration and dynamic matching techniques. In Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, VLSI-DAT 2012, Hsinchu, Taiwan, April 23-25, 2012. pages 1-4, IEEE, 2012. [doi]

@inproceedings{TsaiCLSH12,
  title = {A 14-bit 200MS/s current-steering DAC achieving over 82dB SFDR with digitally-assisted calibration and dynamic matching techniques},
  author = {Jen-Huan Tsai and Yen-Ju Chen and Yan-Fong Lai and Meng-Hung Shen and Po-Chiun Huang},
  year = {2012},
  doi = {10.1109/VLSI-DAT.2012.6212594},
  url = {http://dx.doi.org/10.1109/VLSI-DAT.2012.6212594},
  researchr = {https://researchr.org/publication/TsaiCLSH12},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, VLSI-DAT 2012, Hsinchu, Taiwan, April 23-25, 2012},
  publisher = {IEEE},
  isbn = {978-1-4577-2080-2},
}