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Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera. Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling. IEICE Transactions, 88-A(4):885-891, 2005. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Performance limitation of on-chip global interconnects for high-speed signalingAkira Tsuchiya, Yuuya Gotoh, Masanori Hashimoto, Hidetoshi Onodera. cicc 2004: 489-492 [doi] Alternate Self-Shielding for High-Speed and Reliable On-Chip Global InterconnectYoichi Yuyama, Akira Tsuchiya, Kazutoshi Kobayashi, Hidetoshi Onodera. ieicet, 89-C(3):327-333, 2006. [doi]
The following publications are possibly variants of this publication: