A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter

Masaki Tsukude, Kazutami Arimoto, Hideto Hidaka, Yasuhiro Konishi, Masanori Hayashikishi, Katsunori Suma, Kazuyasu Fujishima. A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter. In Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992. pages 615-622, IEEE Computer Society, 1992.

Abstract

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