A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter

Masaki Tsukude, Kazutami Arimoto, Hideto Hidaka, Yasuhiro Konishi, Masanori Hayashikishi, Katsunori Suma, Kazuyasu Fujishima. A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter. In Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992. pages 615-622, IEEE Computer Society, 1992.

@inproceedings{TsukudeAHKHSF92,
  title = {A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter},
  author = {Masaki Tsukude and Kazutami Arimoto and Hideto Hidaka and Yasuhiro Konishi and Masanori Hayashikishi and Katsunori Suma and Kazuyasu Fujishima},
  year = {1992},
  tags = {testing},
  researchr = {https://researchr.org/publication/TsukudeAHKHSF92},
  cites = {0},
  citedby = {0},
  pages = {615-622},
  booktitle = {Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992},
  publisher = {IEEE Computer Society},
  isbn = {0-7803-0760-7},
}