Clock period minimization with minimum area overhead in high-level synthesis of nonzero clock skew circuits - researchr publication

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Wen-Pin Tu, Shih-Hsu Huang, Chun-Hua Cheng. Clock period minimization with minimum area overhead in high-level synthesis of nonzero clock skew circuits. In Proceedings of the 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, January 30 - February 2, 2012. pages 245-250, IEEE, 2012. [doi]

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