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A High Throughput Multiplier Design Exploiting Input Based Statistical Distribution in Completion Delays

Ravi Tej Uppu, Ravi Kanth Uppu, Adit D. Singh, Abhijit Chatterjee. A High Throughput Multiplier Design Exploiting Input Based Statistical Distribution in Completion Delays. In 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, Pune, India, January 5-10, 2013. pages 109-114, IEEE, 2013. [doi]

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