Discrete-time, cyclostationary phase-locked loop model for jitter analysis

Sokratis D. Vamvakos, Vladimir Stojanovic, Borivoje Nikolic. Discrete-time, cyclostationary phase-locked loop model for jitter analysis. In IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings. pages 637-640, IEEE, 2009. [doi]

Abstract

Abstract is missing.