A Decimal/Binary Multi-operand Adder Using a Fast Binary to Decimal Converter

Ch. Santosh Varma, Syed Ershad Ahmed, M. B. Srinivas. A Decimal/Binary Multi-operand Adder Using a Fast Binary to Decimal Converter. In 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014. pages 365-368, IEEE, 2014. [doi]

@inproceedings{VarmaAS14,
  title = {A Decimal/Binary Multi-operand Adder Using a Fast Binary to Decimal Converter},
  author = {Ch. Santosh Varma and Syed Ershad Ahmed and M. B. Srinivas},
  year = {2014},
  doi = {10.1109/VLSID.2014.69},
  url = {http://dx.doi.org/10.1109/VLSID.2014.69},
  researchr = {https://researchr.org/publication/VarmaAS14},
  cites = {0},
  citedby = {0},
  pages = {365-368},
  booktitle = {2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014},
  publisher = {IEEE},
}