Vishak Venkatraman, Wayne Burleson. Impact of Process Variations on Multi-Level Signaling for On-Chip Interconnects. In 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India. pages 362-367, IEEE Computer Society, 2005. [doi]
Abstract is missing.