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Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas. A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS. J. Solid-State Circuits, 45(10):2080-2090, 2010. [doi]
Abstract is missing.