Design for Strong Testability of RTL Data Paths to Provide Complete Fault Efficiency

Hiroki Wada, Toshimitsu Masuzawa, Kewal K. Saluja, Hideo Fujiwara. Design for Strong Testability of RTL Data Paths to Provide Complete Fault Efficiency. In 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India. pages 300-305, IEEE Computer Society, 2000. [doi]

Abstract

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