Yuanzhong Wan, Maitham Shams. Optimization of Mixed Logic Circuits with Application to a 64-Bit Static Adder. In 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India. pages 261-266, IEEE Computer Society, 2005. [doi]
Abstract is missing.