Lin Wang, Yong Chen 0005, Chaowei Yang, Xionghui Zhou, Mei Han, Crovetti Paolo Stefano, Pui-In Mak, Rui Paulo Martins. A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with deliberate-current-mismatch frequency detection and interpolation-based multiphase clock generation. I. J. Circuit Theory and Applications, 51(5):1988-2015, May 2023. [doi]
Abstract is missing.