A 10-bit 150MS/s SAR ADC with parallel segmented DAC in 65nm CMOS

Xiaoyang Wang, Qiang Li. A 10-bit 150MS/s SAR ADC with parallel segmented DAC in 65nm CMOS. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 309-312, IEEE, 2014. [doi]

Abstract

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