Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package

Kai-li Wang, Bing-Yang Lin, Cheng-Wen Wu, Mincent Lee, Hao Chen, Hung-Chih Lin, Ching-Nen Peng, Min-Jer Wang. Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package. IEEE Design & Test of Computers, 34(3):50-58, 2017. [doi]

Abstract

Abstract is missing.