Resource allocation methodology for through silicon vias and sleep transistors in 3D ICs

Hailang Wang, Emre Salman. Resource allocation methodology for through silicon vias and sleep transistors in 3D ICs. In Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015. pages 528-532, IEEE, 2015. [doi]

Authors

Hailang Wang

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Emre Salman

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