Verifying Pipelined-RAM Consistency over Read/Write Traces of Data Replicas

Hengfeng Wei, Marzio De Biasi, Yu Huang 0002, Jiannong Cao, Jian Lu. Verifying Pipelined-RAM Consistency over Read/Write Traces of Data Replicas. IEEE Trans. Parallel Distrib. Syst., 27(5):1511-1523, 2016. [doi]

Abstract

Abstract is missing.