2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

He Gong Wei, Chi-Hang Chan, U-Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Franco Maloberti. 2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS. In IEEE International Solid-State Circuits Conference, ISSCC 2011, Digest of Technical Papers, San Francisco, CA, USA, 20-24 February, 2011. pages 188-190, IEEE, 2011. [doi]

Abstract

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