Chi-Hsien Wu, Jau-Ji Jou, Hsin-Wen Ting, Shao-I Chu, Bing-Hong Liu. Multi-channel multi-gigabit PRBS generator with a built-in clock in 0.18-μm CMOS technology. In International SoC Design Conference, ISOCC 2017, Seoul, Korea (South), November 5-8, 2017. pages 276-277, IEEE, 2017. [doi]
@inproceedings{WuJTCL17,
title = {Multi-channel multi-gigabit PRBS generator with a built-in clock in 0.18-μm CMOS technology},
author = {Chi-Hsien Wu and Jau-Ji Jou and Hsin-Wen Ting and Shao-I Chu and Bing-Hong Liu},
year = {2017},
doi = {10.1109/ISOCC.2017.8368893},
url = {https://doi.org/10.1109/ISOCC.2017.8368893},
researchr = {https://researchr.org/publication/WuJTCL17},
cites = {0},
citedby = {0},
pages = {276-277},
booktitle = {International SoC Design Conference, ISOCC 2017, Seoul, Korea (South), November 5-8, 2017},
publisher = {IEEE},
isbn = {978-1-5386-2285-8},
}