BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs

Kai-Chiang Wu, Ing-Chao Lin, Yao-Te Wang, Shuen-Shiang Yang. BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 33(10):1591-1595, 2014. [doi]

Abstract

Abstract is missing.