Lanhua Xia, Jianhui Wu, Zhikuang Cai. A self-refereed design-for-test structure of CP-PLL for on-chip jitter measurement. IEICE Electronic Express, 15(4):20171215, 2018. [doi]
@article{XiaWC18,
title = {A self-refereed design-for-test structure of CP-PLL for on-chip jitter measurement},
author = {Lanhua Xia and Jianhui Wu and Zhikuang Cai},
year = {2018},
doi = {10.1587/elex.15.20171215},
url = {https://doi.org/10.1587/elex.15.20171215},
researchr = {https://researchr.org/publication/XiaWC18},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {15},
number = {4},
pages = {20171215},
}