A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology

Bo Xiang, Yongping Fan, James S. Ayers, James Shen, Dan Zhang. A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology. In 2020 IEEE Custom Integrated Circuits Conference, CICC 2020, Boston, MA, USA, March 22-25, 2020. pages 1-4, IEEE, 2020. [doi]

Authors

Bo Xiang

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Yongping Fan

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James S. Ayers

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James Shen

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Dan Zhang

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