Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units

Mimi Xie, Chen Pan, Jingtong Hu, Chengmo Yang, Yiran Chen. Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units. In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015. pages 316-321, IEEE, 2015. [doi]

Abstract

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