A high performance VLSI architecture for integer motion estimation in HEVC

Yuan Xu, Jinsong Liu, Liwei Gong, Zhi Zhang, Robert K. F. Teng. A high performance VLSI architecture for integer motion estimation in HEVC. In IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013. pages 1-4, IEEE, 2013. [doi]

Abstract

Abstract is missing.