Delay Test Scan Flip-Flop: DFT for High Coverage Delay Testing - researchr publication

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Gefu Xu, Adit D. Singh. Delay Test Scan Flip-Flop: DFT for High Coverage Delay Testing. In 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India. pages 763-768, IEEE Computer Society, 2007. [doi]

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