H. Yamada, T. Hotta, T. Nishiyama, F. Murabayashi, T. Yamauchi, H. Sawamoto. A 13.3ns double-precision floating-point ALU and multiplier. In 1995 International Conference on Computer Design (ICCD 95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings. pages 466, IEEE Computer Society, 1995. [doi]
Abstract is missing.