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An experimental soft-error-immune 64-kbit 3-ns ECL bipolar RAM

Kunihiko Yamaguchi, Hiroaki Nanbu, Kazuo Kanetani, Noriyuki Homma, Tohru Nakamura, Kenichi Ohhata, Akihisa Uchida, Katsumi Ogiue. An experimental soft-error-immune 64-kbit 3-ns ECL bipolar RAM. J. Solid-State Circuits, 24(5):1390-1396, October 1989. [doi]

Authors

Kunihiko Yamaguchi

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Hiroaki Nanbu

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Kazuo Kanetani

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Noriyuki Homma

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Tohru Nakamura

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Kenichi Ohhata

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Akihisa Uchida

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Katsumi Ogiue

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