Thermal via planning for temperature reduction in 3D ICs

Jin-Tai Yan, Yu-Cheng Chang, Zhi-Wei Chen. Thermal via planning for temperature reduction in 3D ICs. In Thomas B├╝chner, Ramalingam Sridhar, Andrew Marshall, Norbert Schuhmann, editors, Annual IEEE International SoC Conference, SoCC 2010, September 27-29, 2010, Las Vegas, NV, USA, Proceedings. pages 392-395, IEEE, 2010. [doi]

Abstract

Abstract is missing.