Kai Yang, Robert Karam, Swarup Bhunia. Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 409-412, IEEE, 2017. [doi]
Abstract is missing.