A 10.5 Gbps 0.55 pJ/bit PAM-3 Transceiver Using a Self-driven Dual TIA Receiver and Floating Impedance Matching for Parallel On-chip Transmission Lines

Dong Hyun Yoon, Junsen He, Kwang-Hyun Baek, Youngdon Choi, Jung Hwan Choi, Tony Tae-Hyoung Kim. A 10.5 Gbps 0.55 pJ/bit PAM-3 Transceiver Using a Self-driven Dual TIA Receiver and Floating Impedance Matching for Parallel On-chip Transmission Lines. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2024, Hiroshima, Japan, November 18-21, 2024. pages 1-3, IEEE, 2024. [doi]

Abstract

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