An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold configuring comparator

Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro. An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold configuring comparator. In Proceedings of the 38th European Solid-State Circuit conference, ESSCIRC 2012, Bordeaux, France, September 17-21, 2012. pages 381-384, IEEE, 2012. [doi]

Abstract

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