Automatic Assertion Generation for Simulation, Formal Verification and Emulation

Tong Zhang, Daniel G. Saab, Jacob A. Abraham. Automatic Assertion Generation for Simulation, Formal Verification and Emulation. In 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, Germany, July 3-5, 2017. pages 471-476, IEEE, 2017. [doi]

@inproceedings{ZhangSA17-0,
  title = {Automatic Assertion Generation for Simulation, Formal Verification and Emulation},
  author = {Tong Zhang and Daniel G. Saab and Jacob A. Abraham},
  year = {2017},
  doi = {10.1109/ISVLSI.2017.88},
  url = {https://doi.org/10.1109/ISVLSI.2017.88},
  researchr = {https://researchr.org/publication/ZhangSA17-0},
  cites = {0},
  citedby = {0},
  pages = {471-476},
  booktitle = {2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, Germany, July 3-5, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-6762-6},
}