Quad-multiplier packing based on customized floating point for convolutional neural networks on FPGA - researchr publication

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Zhifeng Zhang, Dajiang Zhou, Shihao Wang, Shinji Kimura. Quad-multiplier packing based on customized floating point for convolutional neural networks on FPGA. In 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018. pages 184-189, IEEE, 2018. [doi]

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