A Hardware-efficient Accelerator for Encoding Stage of Text-to-speech Synthesis

Riyong Zheng, Chenghao Wang 0006, Jun Han 0003, Xiaoyang Zeng. A Hardware-efficient Accelerator for Encoding Stage of Text-to-speech Synthesis. In 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019. pages 1-3, IEEE, 2019. [doi]

Abstract

Abstract is missing.