A near threshold error resilient processor based on dynamic timing error prediction and within-a-cycle timing error correction

Tao-Tao Zhu, Xiaoyan Xiang, Chen Chen, Jianyi Meng. A near threshold error resilient processor based on dynamic timing error prediction and within-a-cycle timing error correction. In 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015. pages 1-4, IEEE, 2015. [doi]

Abstract

Abstract is missing.