Abstract is missing.
- Performance Estimation of Deeply Pipelined Fluid Simulation on Multiple FPGAs with High-speed Communication SubsystemAntoniette Mondigo, Kentaro Sano, Hiroyuki Takizawa. 1-4 [doi]
- GPU Acceleration of Advanced k-mer Counting for Computational GenomicsHuiren Li, Anand Ramachandran, Deming Chen. 1-4 [doi]
- Adaptively Banded Smith-Waterman Algorithm for Long Reads and Its Hardware AcceleratorYi-Lun Liao, Yu-Cheng Li, Nae-Chyun Chen, Yi-Chang Lu. 1-9 [doi]
- A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute NodesAchim Lösch, Marco Platzner. 1-8 [doi]
- Touch-based Smartphone Authentication Using Import Vector Domain DescriptionBin Zou, Yantao Li. 1-4 [doi]
- Clarifications and Optimizations on Rounding for IEEE-compliant Floating-Point MultiplicationTuan D. Nguyen, Son Bui, James E. Stine. 1-8 [doi]
- GAP-8: A RISC-V SoC for AI at the Edge of the IoTEric Flamand, Davide Rossi, Francesco Conti 0001, Igor Loi, Antonio Pullini, Florent Rotenberg, Luca Benini. 1-4 [doi]
- Linux synchronization barrier on MPSoC: Hardware/software accurate study and optimizationMaxime France-Pillois, Jérôme Martin, Frédéric Rousseau. 1-4 [doi]
- A Configurable Framework for Hough-Transform-Based Embedded Object Recognition SystemsJulian Sarcher, Christian Scheglmann, Alexander Zoellner, Tim Dolereit, Michael Schaeferling, Matthias Vahl, Gundolf Kiefer. 1-8 [doi]
- Simple Instruction-Set Computer for Area and Energy-Sensitive IoT Edge DevicesKaoru Saso, Yuko Hara-Azumi. 1-4 [doi]
- Five-point algorithm: An efficient cloud-based FPGA implementationMarco Rabozzi, Emanuele Del Sozzo, Lorenzo Di Tucci, Marco D. Santambrogio. 1-8 [doi]
- BiSME: A Hardware Coprocessor to Perform Signature Matching at Multi-Gigabit RatesSubramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf, Thomas Wild. 1-9 [doi]
- Hardware Compilation of Deep Neural Networks: An OverviewRuizhe Zhao, Shuanglong Liu, Ho-Cheung Ng, Erwei Wang, James J. Davis, Xinyu Niu, Xiwei Wang, Huifeng Shi, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk. 1-8 [doi]
- Implementing and Parallelizing Real-time Lane Detection on Heterogeneous PlatformsXiebing Wang, Christopher Kiwus, Canhao Wu, Biao Hu, Kai Huang 0001, Alois Knoll. 1-8 [doi]
- Compressive Sensing on Storage Data: An Effective Solution to Alleviate I/0 Bottleneck in Data- Intensive WorkloadsHosein Mohammadi Makrani, Hossein Sayadi, Sai Manoj P. D., Setareh Rafatirad, Houman Homayoun. 1-8 [doi]
- A Real-Time Learning-Based Super-Resolution System Using Direct Simple FunctionsDaolu Zha, Xi Jin, Rui Shang, Pengfei Yang. 1-4 [doi]
- From Tensor Algebra to Hardware Accelerators: Generating Streaming Architectures for Solving Partial Differential EquationsFrancis P. Russell, James Stanley Targett, Wayne Luk. 1-8 [doi]
- Data-flow Aware CNN Accelerator with Hybrid Wireless InterconnectionMitali Sinha, Sri Harsha Gade, Wazir Singh, Sujay Deb. 1-4 [doi]
- Reconfigurable Co-Processor Architecture with Limited Numerical Precision to Accelerate Deep Convolutiosnal Neural NetworksSasindu Wijeratne, Sandaruwan Jayaweera, Mahesh Dananjaya, Ajith Pasqual. 1-7 [doi]
- Synthetic Data Approach for Classification and RegressionYang Yue, Ying Li 0015, Kexin Yi, Zhonghai Wu. 1-8 [doi]
- Towards Hardware Accelerated Reinforcement Learning for Application-Specific Robotic ControlShengjia Shao, Jason Tsai, Michal Mysior, Wayne Luk, Thomas C. P. Chau, Alexander Warren, Ben Jeppesen. 1-8 [doi]
- Meta-implementation of vectorized logarithm function in binary floating-point arithmeticHugues de Lassus Saint-Genies, Nicolas Brunie, Guillaume Revy. 1-8 [doi]
- Edge Intelligence: Challenges and Opportunities of Near-Sensor Machine Learning ApplicationsGeorge Plastiras, Maria Terzi, Christos Kyrkou, Theocharis Theocharides. 1-7 [doi]
- REMAP: Remote mEmory Manager for disAggregated PlatformsDimitris Theodoropoulos, Andrea Reale, Dimitris Syrivelis, Maciej Bielski, Nikolaos Alachiotis, Dionisios N. Pnevmatikatos. 1-8 [doi]
- Solving Maxwell's Equations with Modern C++ and SYCL: A Case StudyAyesha Afzal, Christian Schmitt 0003, Samer Alhaddad, Yevgen Grynko, Jürgen Teich, Jens Förstner, Frank Hannig. 1-8 [doi]
- A Reading Comprehension Style Question Answering Model Based On Attention MechanismLinlong Xiao, Nanzhi Wang, Guocai Yang. 1-4 [doi]
- A Customized Processing-in-Memory Architecture for Biological Sequence AlignmentNasrin Akbari, Mehdi Modarressi, Masoud Daneshtalab, Mohammad Loni. 1-8 [doi]
- Design Space Exploration for Orlando Ultra Low-Power Convolutional Neural Network SoCAhmet Erdem, Cristina Silvano, Thomas Boesch, Andrea Ornstein, Surinder-pal Singh, Giuseppe Desoli. 1-7 [doi]
- An Explicitly Parallel Architecture for Packet Parsing in Software Defined NetworksHesam Zolfaghari, Davide Rossi, Jari Nurmi. 1-4 [doi]
- A Scalable FPGA Design for Cloud N-Body SimulationEmanuele Del Sozzo, Marco Rabozzi, Lorenzo Di Tucci, Donatella Sciuto, Marco D. Santambrogio. 1-8 [doi]
- Real-Time High-Quality Stereo Matching System on a GPUQiong Chang, Tsutomu Maruyama. 1-8 [doi]
- A Unified Backend for Targeting FPGAs from DSLsEmanuele Del Sozzo, Riyadh Baghdadi, Saman P. Amarasinghe, Marco D. Santambrogio. 1-8 [doi]
- Enhanced Visual Loop Closing for Laser-Based SLAMZulun Zhu, Shaowu Yang, Huadong Dai. 1-4 [doi]
- Resource-efficient Reconfigurable Computer-on-Module for Embedded Vision ApplicationsDaniel Klimeck, Hanno Gerd Meyer, Jens Hagemeyer, Mario Porrmann, Ulrich Rückert 0001. 1-4 [doi]
- A Soft Dual-Processor System with a Partially Run-Time Reconfigurable Shared 128-Bit SIMD EngineJose Raul Garcia Ordaz, Dirk Koch. 1-8 [doi]
- Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case StudyEricles Rodrigues Sousa, Michael Witterauf, Marcel Brand, Alexandru Tanase, Frank Hannig, Jürgen Teich. 1-9 [doi]
- Clean the Scratch Registers: A Way to Mitigate Return-Oriented Programming AttacksZelin Rong, Peidai Xie, Jingyuan Wang, Shenglin Xu, Yongjun Wang. 1-8 [doi]
- Low-power Design of a Gravity Rotation Module for HAR Systems Based on Inertial SensorsAntonio De Vita, Gian Domenico Licciardo, Luigi Di Benedetto, Danilo Pau, Emanuele Plebani, Angelo Bosco. 1-4 [doi]
- Dynamic Coherent Cluster: A Scalable Sharing Set Management ApproachJulie Dumas, Eric Guthmuller, Frédéric Pétrot. 1-8 [doi]
- FPGA-based PairHMM Forward Algorithm for DNA Variant CallingDavide Sampietro, Chiara Crippa, Lorenzo Di Tucci, Emanuele Del Sozzo, Marco D. Santambrogio. 1-8 [doi]
- Fast Energy Estimation Through Partial Execution of HPC ApplicationsJuan Carlos Salinas-Hilburg, Marina Zapater, José Manuel Moya, José Luis Ayala. 1-8 [doi]