Abstract is missing.
- Hardware Architectures for Programming Languages and Programming Languages for Hardware ArchitecturesNiklaus Wirth. 2-8
- VLSI Assist For a MultiprocessorBob Beck, Bob Kasten, Shreekant S. Thakkar. 10-20
- Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor ArchitecturesRichard F. Rashid, Avadis Tevanian, Michael Young, David B. Golub, Robert V. Baron, David L. Black, William J. Bolosky, Jonathan Chew. 31-39
- An Architecture for the Direct Execution of the Forth Programming LanguageJohn R. Hayes, Martin E. Fraeman, Robert L. Williams, Thomas Zaremba. 42-49
- Tags and Type Checking in Lisp: Hardware and Software ApproachesPeter Steenkiste, John L. Hennessy. 50-59
- The Effect of Instruction Set Complexity on Program Size and Memory PerformanceJack W. Davidson, Richard A. Vaughan. 60-64
- The Dragon ProcessorRussell R. Atkinson, Edward M. McCreight. 65-69
- Coherency for Multiprocessor Virtual Address CachesJames R. Goodman. 72-81
- Cheap Hardware Support for Software Debugging and ProfilingThomas A. Cargill, Bart N. Locanthi. 82-83
- An Experimental Coprocessor for Implementing Persistant Objects on an IBM 4381Christos J. Georgiou, S. L. Palmer, P. L. Rosenfeld. 84-87
- Integer Multiplication and Division on the HP Precision ArchitectureDaniel J. Magenheimer, Liz Peters, Karl Pettis, Dan Zuras. 90-99
- The Mahler Experience: Using and Intermediate Language as the Machine DescriptionDavid W. Wall, Michael L. Powell. 100-104
- A Study of Scalar Compilation Techniques for Pipelined SupercomputersShlomo Weiss, James E. Smith. 105-109
- Compiling Smalltalk-80 to a RISCWilliam R. Bush, A. Dain Samples, David Ungar, Paul N. Hilfinger. 112-116
- How Many Addressing Modes are Enough?Fred C. Chow, Steven Correll, Mark I. Himelstein, Earl Killian, Larry Weber. 117-121
- Superoptimizer - A Look at the Smallest ProgramHenry Massalin. 122-126
- Performance and Architectural Evaluation of the PSI MachineKazuo Taki, Katsuto Nakajima, Hiroshi Nakashima, Morihiro Ikeda. 128-135
- A RISC Architecture for Symbolic ComputationRichard B. Kieburtz. 146-155
- Design Tradeoffs to Support the C Programming Language in the CRISP MicroprocessorDavid R. Ditzel, Hubert R. McLellan. 158-163
- Firefly: A Multiprocessor WorkstationCharles P. Thacker, Lawrence C. Stewart. 164-172
- Pipelining and Performance in the VAX 8800 ProcessorDouglas W. Clark. 173-177
- A VLIW Architecture for a Trace Scheduling CompilerRobert P. Colwell, Robert P. Nix, John J. O Donnell, David B. Papworth, Paul K. Rodman. 180-192
- Parallel Computers for Graphics ApplicationsAdam Levinthal, Pat Hanrahan, Mike Paquette, Jim Lawson. 193-198
- The ZS-1 Central ProcessorJames E. Smith, G. E. Dermer, B. D. Vanderwarn, S. D. Klinger, C. M. Rozewski, D. L. Fowler, K. R. Scidmore, James Laudon. 199-204