Abstract is missing.
- Technology for developing regions: Moore s law is not enoughEric A. Brewer. 1-2 [doi]
- Dynamically replicated memory: building reliable systems from nanoscale resistive memoriesEngin Ipek, Jeremy Condit, Edmund B. Nightingale, Doug Burger, Thomas Moscibroda. 3-14 [doi]
- A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routingNevin Kirman, José F. MartÃnez. 15-28 [doi]
- A real system evaluation of hardware atomicity for software speculationNaveen Neelakantam, David R. Ditzel, Craig B. Zilles. 29-38 [doi]
- Dynamic filtering: multi-purpose architecture support for language runtime systemsTim Harris, Sasa Tomic, Adrián Cristal, Osman S. Unsal. 39-52 [doi]
- CoreDet: a compiler and runtime system for deterministic multithreaded executionTom Bergan, Owen Anderson, Joseph Devietti, Luis Ceze, Dan Grossman. 53-64 [doi]
- Speculative parallelization using software multi-threaded transactionsArun Raman, Hanjun Kim, Thomas R. Mason, Thomas B. Jablin, David I. August. 65-76 [doi]
- Respec: efficient online multiprocessor replayvia speculation and external determinismDongyoon Lee, Benjamin Wester, Kaushik Veeraraghavan, Satish Narayanasamy, Peter M. Chen, Jason Flinn. 77-90 [doi]
- Probabilistic job symbiosis modeling for SMT processor schedulingStijn Eyerman, Lieven Eeckhout. 91-102 [doi]
- Request behavior variationsKai Shen. 103-116 [doi]
- Decoupling contention management from schedulingRyan Johnson, Radu Stoica, Anastasia Ailamaki, Todd C. Mowry. 117-128 [doi]
- Addressing shared resource contention in multicore processors via schedulingSergey Zhuravlev, Sergey Blagodurov, Alexandra Fedorova. 129-142 [doi]
- SherLog: error diagnosis by connecting clues from run-time logsDing Yuan, Haohui Mai, Weiwei Xiong, Lin Tan, Yuanyuan Zhou, Shankar Pasupathy. 143-154 [doi]
- Analyzing multicore dumps to facilitate concurrency bug reproductionDasarath Weeratunge, Xiangyu Zhang, Suresh Jagannathan. 155-166 [doi]
- A randomized scheduler with probabilistic guarantees of finding bugsSebastian Burckhardt, Pravesh Kothari, Madanlal Musuvathi, Santosh Nagarakatte. 167-178 [doi]
- ConMem: detecting severe concurrency bugs through an effect-oriented approachWei Zhang, Chong Sun, Shan Lu. 179-192 [doi]
- Characterizing processor thermal behaviorFrancisco J. Mesa-Martinez, Ehsan K. Ardestani, Jose Renau. 193-204 [doi]
- Conservation cores: reducing the energy of mature computationsGanesh Venkatesh, Jack Sampson, Nathan Goulding, Saturnino Garcia, Vladyslav Bryksin, Jose Lugo-Martinez, Steven Swanson, Michael Bedford Taylor. 205-218 [doi]
- Micro-pages: increasing DRAM efficiency with locality-aware data placementKshitij Sudan, Niladrish Chatterjee, David Nellans, Manu Awasthi, Rajeev Balasubramonian, Al Davis. 219-230 [doi]
- Power routing: dynamic power provisioning in the data centerSteven Pelley, David Meisner, Pooya Zandevakili, Thomas F. Wenisch, Jack Underwood. 231-242 [doi]
- Joint optimization of idle and cooling power in data centers while maintaining response timeFaraz Ahmad, T. N. Vijaykumar. 243-256 [doi]
- Butterfly analysis: adapting dataflow analysis to dynamic parallel monitoringMichelle L. Goodstein, Evangelos Vlachos, Shimin Chen, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry. 257-270 [doi]
- ParaLog: enabling and accelerating online parallel monitoring of multithreaded applicationsEvangelos Vlachos, Michelle L. Goodstein, Michael A. Kozuch, Shimin Chen, Babak Falsafi, Phillip B. Gibbons, Todd C. Mowry. 271-284 [doi]
- MacroSS: macro-SIMDization of streaming applicationsAmir Hormati, Yoonseo Choi, Mark Woh, Manjunath Kudlur, Rodric M. Rabbah, Trevor N. Mudge, Scott A. Mahlke. 285-296 [doi]
- COMPASS: a programmable data prefetcher using idle GPU shadersDong Hyuk Woo, Hsien-Hsin S. Lee. 297-310 [doi]
- Flexible architectural support for fine-grain schedulingDaniel Sanchez, Richard M. Yoo, Christos Kozyrakis. 311-322 [doi]
- Specifying and dynamically verifying address translation-aware memory consistencyBogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin. 323-334 [doi]
- Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systemsEiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N. Patt. 335-346 [doi]
- An asymmetric distributed shared memory model for heterogeneous parallel systemsIsaac Gelado, Javier Cabezas, Nacho Navarro, John E. Stone, Sanjay J. Patel, Wen-mei W. Hwu. 347-358 [doi]
- Inter-core cooperative TLB for chip multiprocessorsAbhishek Bhattacharjee, Margaret Martonosi. 359-370 [doi]
- Orthrus: efficient software integrity protection on multi-coresRuirui Huang, Daniel Y. Deng, G. Edward Suh. 371-384 [doi]
- Shoestring: probabilistic soft error reliability on the cheapShuguang Feng, Shantanu Gupta, Amin Ansari, Scott A. Mahlke. 385-396 [doi]
- Virtualized and flexible ECC for main memoryDoe Hyun Yoon, Mattan Erez. 397-408 [doi]