Abstract is missing.
- Process Calculi, from Theory to Practice: Verification ToolsGérard Boudol, Valérie Roy, Robert de Simone, Didier Vergamini. 1-10
- Testing Equivalence as a Bisimulation EquivalenceRance Cleaveland, Matthew Hennessy. 11-23
- The Concurrency WorkbenchRance Cleaveland, Joachim Parrow, Bernhard Steffen. 24-37
- Argonaute: Graphical Description, Semantics and Verification of Reactive Systems by Using a Process AlgebraFlorence Maraninchi. 38-53
- Using the Adxiomatic Presentation of Behavioural Equivalences for Manipulating CCS SpecificationsRocco De Nicola, Paola Inverardi, Monica Nesi. 54-67
- Verifying Properties of Large Sets of Processes with Network InvariantsPierre Wolper, Vinciane Lovinfosse. 68-80
- A Method for Verification of Trace and Test EquivalenceIvan Christoff. 81-88
- Projections of the Reachability Graph and Environment ModelsHeiko Krumm. 89-96
- Proving Properties of Elementary Net Systems with a Special-Purpose Theorem ProverHeikki Tuominen. 97-104
- Verification by Abstraction and BisimulationHan Zuidweg. 105-116
- MEC: A System for Constructing and Analysing Transition SystemsAndré Arnold. 117-132
- Fair SMG and Linear Time Model CheckingHoward Barringer, Michael Fisher, Graham Gough. 133-150
- Network Grammars, Communication Behaviors and Automatic VerificationZe ev Shtadler, Orna Grumberg. 151-165
- CCS, Liveness, and Local Model Checking in the Linear Time Mu-CalculusColin Stirling, David Walker. 166-178
- Implementing a Model Checking Algorithm by Adapting Existing Automated ToolsBengt Jonsson, Ahmed Hussain Khan, Joachim Parrow. 179-188
- On-Line Model Checking for Finite Linear Temporal Logic SpecificationsClaude Jard, Thierry Jéron. 189-196
- Timing Assumptions and Verification of Finite-State Concurrent SystemsDavid L. Dill. 197-212
- Specifying, Programming and Verifying Real-Time Systems Using a Synchronous Declarative LanguageNicolas Halbwachs, Daniel Pilaud, Farid Ouabdesselam, A.-C. Glory. 213-231
- Modal SpecificationsKim Guldstrand Larsen. 232-246
- Automated Verification of Timed Transition ModelsJonathan S. Ostroff. 247-256
- Temporal Logic Case StudyWilliam G. Wood. 257-263
- The Complexity of Collapsing Reachability GraphsSudhir Aggarwal, Daniel Barbará, Walter Cunto, M. R. Garey. 264-274
- What are the Limits of Model Checking Methods for the Verification of Real Life Protocols?Susanne Graf, Jean-Luc Richier, Carlos Rodriguez, Jacques Voiron. 275-285
- Requirement Analysis for Communication ProtocolsPierre Azéma, François Vernadat, Jean Christophe Lloret. 286-293
- State Exploration by Transformation with LOLAJuan Quemada, Santiago Pavón, Angel Fernández. 294-302
- Parallel Protocol Verification: The Two-Phase Algorithm and Complexity AnalysisMaria C. Yuang, Aaron Kershenbaum. 303-316
- Formal Verification of Synchronous Circuits based on String-Functional Semantics: The 7 Paillet Circuits in Boyer-MooreAlexandre Bronstein, Carolyn L. Talcott. 317-333
- Combining CTL, Trace Theory and Timing ModelsJerry R. Burch. 334-348
- Localized Verification of Circuit DescriptionsJørgen Staunstrup, Stephen J. Garland, John V. Guttag. 349-364
- Verification of Synchronous Sequential Machines Based on Symbolic ExecutionOlivier Coudert, Christian Berthet, Jean Christophe Madre. 365-373
- Parallel Composition of Lockstep Synchronous Processes for Hardware Validation: Divide-and-Conquer CompositionGanesh Gopalakrishnan, Narayana Mani, Venkatesh Akella. 374-382